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Flexible artificial synapses, capable of processing signals with high efficiency and compatible with 3D biological systems in morphology, are of great significance to develop artificial perception systems and make a revolution in the field of sensing technology. However, the low energy-efficiency and performance degradation under deformation are the main obstacles for the existing artificial synapses to be used for the development of artificial perception systems. Therefore, in this project, a vertical structure synaptic transistor has been proposed to overcome the above challenges. Firstly, the dimension of the transistor, which is related with the power consumption of the synaptic device, is to be scaled by simply reducing the thickness of the channel material, WS2, benefited from the vertical structure design. The impact of the channel properties and scaling effect on power consumption and other synaptic characteristics will also be illustrated. In addition, the carrier drift in the channel of the vertical structure transistor is insensitive to the device deformation, which is distinct from that of the planar structure counterpart. As a result, the stability of the device performance can be enhanced by taking the advantage of the vertical structure design and its optimization will also be carried out by analyzing of the influence of deformation and heterogeneous interface on device performance. Therefore, it is expected that flexible artificial synapses with low power consumption, less than 1 fJ/spike, will be designed and fabricated in this project. The research output will build a solid foundation for the development of artificial perception systems.
For more information about doctoral scholarship and PhD programme at Xi’an JiaotongLiverpool University (XJTLU), please visit:
https://www.xjtlu.edu.cn/en/admissions/global/entry-requirements/
https://www.xjtlu.edu.cn/en/admissions/global/fees-and-scholarship
The candidate should have a first class or upper second class honours degree, or a master’s degree (or equivalent qualification), in Microelectronics, Electronic Science and Engineering, Applied Chemistry
Evidence of good spoken and written English is essential. The candidate should have an IELTS score of 6.5 or above, if the first language is not English. This position is open to all qualified candidates irrespective of nationality.
The student will be awarded a PhD degree from the University of Liverpool (UK) upon successful completion of the program.
The PhD studentship is available for three years subject to satisfactory progress by the student. The award covers tuition fees for three years (currently equivalent to RMB 99,000 per annum). It also provides up to RMB 16,500 to allow participation at international conferences during the period of the award. The scholarship holder is expected to carry out the major part of his or her research at XJTLU in Suzhou, China. However, he or she is eligible for a research study visit to the University of Liverpool up to six months, if this is required by the project.
Interested applicants are advised to email Qifeng.lu@xjtlu.edu.cn, the following documents for initial review and assessment (please put the project title in the subject line).
Please email Qifeng.Lu@xjtlu.edu.cn with a subject line of the PhD project title. https://www.xjtlu.edu.cn/en/study/departments/entrepreneur-collegetaicang/college-staff/academic-staff/staff/qifeng-lu
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