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Design, development and implementation of an in-orbit laboratory based on reconfigurable hardware, on board of a small satellite, for the test and characterization of complex digital circuits


Project Description

Research topic:
The objective of this research project is to design and implement an in-orbit lab for a small satellite, whose goal will be to test complex digital circuits. Within this project, the admitted student will work on the design and implementation of a fault tolerant processor for space applications, which will be tested in the satellite. The satellite will be a 3U CubeSat that will be placed in LEO orbit. The satellite payload will consist of a 7-series last generation Xilinx FPGA, where the designed processor will be implemented. Several experiments will be conducted on this processor to study its behavior in the presence of space radiation.

Some of the tasks the student will perform are the following:
- Research on standard protection techniques to be applied to the processor under study.
- Design of new ad-hoc protection techniques.
- Definition and implementation of the FPGA payload.
- Integration and test of the payload with the satellite.
- Analysis of in-orbit experiments.

The study of reliability in microprocessors, memories and auxiliary components will be part of the tasks associated to this goal.

Qualifications:
- A M.Sc. degree in computer engineering, electronic engineering or similar disciplines.
- Sound knowledge and expertise in Digital Design, Computer Architecture, HDL (VHDL or Verilog) and FPGAs.
- Good interpersonal and communication skills (oral and written).

Funding:
- Funding Duration: 3 years (plus a 4th year extension)
- Important: Applications will be reviewed in a first come – first served basis until the scholarship is assigned.

About ARIES:
ARIES (Aerospace Research and Innovation in Electronic Systems) is a research center integrated in the ecosystem of Nebrija University. This center was founded as an initiative of Nebrija to promote research in the field of fault tolerant electronics for space applications. The positioning and scientific achievements reached in this area by Nebrija University has led to the creation of this center, proving a strong commitment to quality research.

Application Procedure:
Application documents - (1) CV, (2) academic transcripts, and (3) 1-page personal statement outlining motivation, interest and eligibility for the post - should be emailed directly to Dr. Juan Antonio Maestro ().
Applications will be reviewed in a first come – first served basis until the scholarship is assigned.

Funding Notes

- Funding Duration: 3 years (plus a 4th year extension)
- Important: Applications will be reviewed in a first come – first served basis until the scholarship is assigned.

References

More information and references in http://www.nebrija.es/aries

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