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Developmental dynamics for Network-on-Chip systems

Department of Electronic Engineering

About the Project

The Network-on-Chip (NoC) paradigm, a subject of intense research in both the academic and the industrial worlds, is based on the parallel execution of program threads on many relatively simple processing elements. The mapping of the threads to the processing elements is, conventionally, a static process, based on performance estimates carried out at compile time. The aim of this project, which builds on past work on the design of custom processors, is to investigate how some of the mechanisms that control the development of multi-cellular organisms (growth, cell death, cicatrization, ...) can be applied to networks of processing elements to optimize their computational performance (for example, by replicating overloaded processors or eliminating idle ones at runtime).

Entry requirements:
Candidates should have (or expect to obtain) a minimum of a UK upper second class honours degree (2.1) or equivalent in Electronic and Electrical Engineering, Physics, Computer Science, Mathematics, Music Technology or a closely related subject.

How to apply:
Applicants should apply via the University’s online application system at Please read the application guidance first so that you understand the various steps in the application process.

Funding Notes

This is a self-funded project and you will need to have sufficient funds in place (eg from scholarships, personal funds and/or other sources) to cover the tuition fees and living expenses for the duration of the research degree programme. Please check the Electronic Engineering website View Website for details about funding opportunities at York.

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