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Evolutionary mapping of algorithms to arrays of processors

Department of Electronic Engineering

About the Project

The Network-on-Chip (NoC) paradigm is a subject of intense research in both the academic and the industrial worlds. Based on the parallel execution of program threads on many relatively simple processing elements, this approach suffers however from a crucial weakness: the difficulty of finding an efficient way to map computation to the array of processors. Building on past work on the design of custom processors, this project seeks to investigate the use of evolutionary algorithms to find acceptable solutions for this NP-complete problem. The project will take into account the optimization of performance at the same time in single processors and in the complete network, by analyzing both the single threads and their communication patterns.

Entry requirements:
Candidates should have (or expect to obtain) a minimum of a UK upper second class honours degree (2.1) or equivalent in Electronic and Electrical Engineering, Physics, Computer Science, Mathematics, Music Technology or a closely related subject.

How to apply:
Applicants should apply via the University’s online application system at Please read the application guidance first so that you understand the various steps in the application process.

Funding Notes

This is a self-funded project and you will need to have sufficient funds in place (eg from scholarships, personal funds and/or other sources) to cover the tuition fees and living expenses for the duration of the research degree programme. Please check the Electronic Engineering website View Website for details about funding opportunities at York.

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