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About the Project
Duration of study: Full time – 3.5 years fixed term
Starting date: Flexible, to start by September 2023
Application deadline: No closing date, the position will remain open until a suitable candidate is found.
Primary Supervisor: Professor Georgios Zervas, Department of Electronic & Electrical Engineering, University College London (UCL)
Project Description:
Data centres are the engine of the Internet. Machine learning training and inference grow exponentially over the last decade and consume most of the computational resources of Data Centres. However, training large-scale models like GPT3 and even larger ones that are upcoming require the use of 1000s of servers working in parallel. Current multi-tier electronic networks and collective operations (MPIs) have become the bottleneck of such parallel and distributed processes as they consume over 90% of the training time leading to a significant slowdown of training time and highly inefficient systems.
This highly ambitious PhD project will explore and develop experimental prototypes of all-optical switched networks using ultra-fast optical switches and state-of-the-art FPGAs to realise real-time 400-800 Gb/s time-division multiplexed network operations as well as MPI collective operations. The aim is to deliver x50 more energy-efficient data centre networks while offering orders of magnitude higher system and application performance like machine learning training speed up. The experimental work will also be complemented with simulations and modelling to assess the performance of the system at scale. This is a highly experimental project with a significant impact. The PhD candidate will join a dynamic team of researchers across various topics, from design and implementation of free space and photonic integrated optical switches, HW-based network scheduling/control, AI/ML for optimization, and distributed systems. The candidate will have the opportunity to participate in EPSRC and EU-funded projects in Classical and Quantum Data Centres that consist of other leading universities and industrial partners.
Funding:
This is a fully funded 3.5-year studentship to cover Home student's tuition fees plus a £20,198/year stipend for living costs (estimated 2023/24) increasing with inflation as well as a top-up contribution towards travel and consumables. Although the fees are only covered at Home rate, Overseas candidates are still welcome to apply. However, they would need to fund the difference between home and overseas fees themselves (e.g. through another award or self-funding) and specify this in their application.
More details about the stipend and fees can be found here: https://www.ucl.ac.uk/research-innovation-services/award-services/research-studentships/studentship-budgets/studentship-budgets-202223
Qualifications Required:
The candidate should pass the entry requirements of PhD programme at UCL EEE: https://www.ucl.ac.uk/prospective-students/graduate/research-degrees/electronic-and-electrical-engineering-mphil-phd
Candidates should have or expect to achieve an excellent degree(s) in Electronic Engineering, Computer Science or a related discipline. The ideal candidate would have experience in and passion for one of the following:
- High-speed FPGA/RTL design experience (VHDL, System Verilog, HLS) on data/stream processing
- Understanding and experimenting with optical communications, switching and networks
- Algorithms for resource optimization and schedulers for data transport
How to apply:
Applications must be made using the UCL online application system by using the UCL postgraduate study application form. Please mark it to the attention of Professor Georgios Zervas.
Contact:
For informal inquiries please contact Professor Georgios Zervas (g.zervas@ucl.ac.uk) who will be happy to answer any queries about the project. You do not need to send your CV with your informal inquiry, but it will help Georgios to best answer your query if you do provide one.
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