FPGA can provide high performance with low power consumption in many of the applications such as Artificial Intelligence Inference, image processing and matrix multiplication. To rapidly design an FPGA application, vendors provide their high-level design tools to shorten the time of bringing the product into the market. However, the nature of development of AI and image processing tend to be experimental and iterative. The developing of Artificial Intelligence and image processing application tends to be experimental and iterative. Because of that, the repeated lengthy synthesis time is still an unresolved problem in the development of AI and image processing applications on FPGAs. This project will provide the opportunity to tackle this challenge by using high-level math abstractions and pre-synthesised library to avoid repeated resynthesis and shorten the synthesis time. The proposed tools can also be used for the applications which requires rapid deployment on FPGAs.
Detailed objectives are as follows:
1. Identify the problem and challenge of current toolchain
2. Design new tools or addons to enhance the user experience, including new hardware abstractions, compilers from high level languages to HDL
3. Evaluating the new approaches
4. Publish journal and conference papers and present the work both internally and externally.
Candidates should have a minimum of an upper second honours degree (2.1) (or equivalent) in Computer Science/Electronics Engineering/Mathematics. A master’s degree is desirable but not necessary. Candidates in other degrees related to Engineering or related fields would be considered. Successfully candidates will study a self-funded PhD in the Department of EEEE at the University of Sheffield under the supervision of Dr Tiantai Deng.