High Performance On-Board Computer with AI and SDR Features for Small-Sized Satellites (Ref: NUDATA24/MPEE/EE/MANSOURABADI)

   Faculty of Engineering and Environment

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  Dr Mojtaba Mansour Abadi, Prof Wai Lok Woo  No more applications being accepted  Competition Funded PhD Project (Students Worldwide)

About the Project

Overview of the CDT

This project is being offered as part of the STFC Centre for Doctoral Training in Data Intensive Science, called NUdata, which is a collaboration between Northumbria and Newcastle Universities, STFC, and a portfolio of over 40 industrial partners, including SMEs, large/multinational companies, Government and not-for profit organisations, and international humanitarian organisations. Please visit https://research.northumbria.ac.uk/nudata/ for full information.

Project Description

Small satellites gather information from on board sensors or other satellites and transmit it to a ground station for further analysis. This feature automatically enforces satellites to have i) a processing unit capable of reading the measurements and preparing them for transmission; and ii) a communication unit connecting the satellite to ground stations. However, this conventional arrangement has several flaws including: i) the processing unit is usually embedded within the on-board computer (OBC) and has few capabilities; ii) the amount of data to transmit is large (e.g., surveillance images from the Earth) due to redundant information; iii) weak computing power of the OBC does not allow any complex analysis, processing algorithm, and artificial intelligence (AI) operations on the satellite, which removes the capability of real-time reaction, data filtering, etc; and iv) the satellite communication module is usually hardware-based, so the client has no capability to reconfigure the communication scheme according to the requirements.

The use of high-performance computers to address these issues has become more popular in small satellites. However, the problem with these current solutions is the lack of integrity and missing full capacity of AI and communication in one signle device. Most of the commercially available modules, come in a predefined fixed configurations that leaves no room for customisation and bespoke design. The hardware is pre-defined and does not allow integration of different parts from different vendors or technologies. Besides, the application or software that runs on the hardware is limited to packages, which have been produced and shipped with the hardware or programmer platform.

Ideally, it is desirable to have access to a variety of processing units or hardware modules that can be integrated into a single unit. Also, the software allows the end-user to freely combine the power of these units and module without being involved in the actual resource allocation or low-level hardware configuration. However, the current available solutions are lacking these features and quite limited in terms of flexibility and providing bespoke design.

During the project, the PhD candidate will use a set of available field programmable gate array (FPGA) development boards to form a cluster of processing powerhouse. In terms of hardware, the appropriate connections between various modules that minimises the number of signal lines and runs at high speed is needed. Such shared connection should share the full access to all high-performance computer properties such as memories, digital signal processing (DSP) units, graphics processing units (GPUs), real-time (Cortex-R) ARM cores, application (Cortex-A) ARM cores, deep learning units (DPUs), and AI cores available on each individual high-performance computer. At the software level, regardless of external hardware connection and arrangement, the computation power will be distributed to deliver the optimum performance. While the hardware connection will use the available standard connections such as peripheral component interconnect express (PCIe), and FPGA Mezzanine connector (FMC), the software will be developed using hardware description languages (HDLs) such as Verilog and VHDL as well as high-level synthesis (HLS) C/C++ codes. The role of the PhD candidate is also to use optimisation technique and AI to manage all available hardware resources and allocate the processing loads across different units in a way that the analysed data throughput is maximised.

Academic Enquiries

This project is supervised by Dr Mojtaba Mansour Abadi. For informal queries, contact [Email Address Removed]. For all other enquiries relating to eligibility or application process contact Admissions ([Email Address Removed]). 

Recruitment Event

You will join a strong and supportive research team. To help better understand the aims of the CDT and to meet the PhD supervisors, we are hosting a day-long event on campus on Monday 15th January 2024. At that event, there will be an opportunity to discuss your research ideas, meet potential PhD supervisors, as well as hear from speakers from a variety of backgrounds (academia, industry, government, charity) discussing both STFC and data science as well as their personal paths and backgrounds. Click here for details.

Eligibility Requirements:

  • Academic excellence i.e. 2:1 (or equivalent GPA from non-UK-universities with preference for 1st class honours); or a Masters (preference-for-Merit-or-above);
  • Appropriate IELTS score, if required.

To be classed as a Home student, candidates must:

  • Be a UK National (meeting-residency-requirements), or
  • have settled status, or
  • have pre-settled status (meeting-residency-requirements), or
  • have indefinite leave to remain or enter.

If a candidate does not meet the criteria above, they would be classed as an International student. 

Applicants will need to be in the UK and fully-enrolled before stipend payments can commence and be aware of the following additional-costs that may be incurred, as these are not covered by the studentship.

For further details on how to apply see


In your application, please include advert reference.

Deadline for applications: 31st January 2024

Start date of course:  23rd September 2024

Northumbria University is committed to creating an inclusive culture where we take pride in, and value, the diversity of our postgraduate research students. We encourage and welcome applications from all members of the community. The University holds a bronze Athena Swan award in recognition of our commitment to advancing gender equality, we are a Disability Confident Leader, a member of the Race Equality Charter and are participating in the Stonewall Diversity Champion Programme. We also hold the HR Excellence in Research award for implementing the concordat supporting the career Development of Researchers and are members of the Euraxess initiative to deliver information and support to professional researchers.

Computer Science (8) Engineering (12)

Funding Notes

The 4-year studentship is available to Home and international (including EU) students and includes a full stipend at UKRI rates (for 2023/24 full-time study this was £18,622 per year) and full tuition fees. Studentships are also available for applicants who wish to study on a part-time basis in combination with work or personal responsibilities.


[1] S. Yuan, et al, “Software defined intelligent satellite-terrestrial integrated networks: Insights and challenges,” Digital Communications and Networks, 2022,
[2] J. M. de la Rosa, "AI-Managed Cognitive Radio Digitizers," IEEE Circuits and Systems, vol. 22, no. 1, pp. 10-39, Firstquarter 2022,
[3] T. Yao, et al, “VenusAI: An artificial intelligence platform for scientific discovery on supercomputers,” Journal of Systems Architecture, vo. 128, 2022,
[4] H. Ouchra and A. Belangour, "Satellite image classification methods and techniques: A survey," 2021 IEEE International Conference on Imaging Systems and Techniques (IST), 2021, pp. 1-6.

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