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High-speed, short-word FPGA digital signal processing for next generation aperture synthesis imagers

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  • Full or part time
    Dr N Salmon
  • Application Deadline
    No more applications being accepted
  • Funded PhD Project (European/UK Students Only)
    Funded PhD Project (European/UK Students Only)

Project Description

The Engineering and Materials Research Centre (MMU-EMRC) at Manchester Metropolitan University offers up to five fully funded PhD studentships (RCUK-matched stipend of £14,057 and MMU UK/EU PhD student fees of £4,052, both per annum for 2015/16, plus some research expenses), for an April 2016 start.

For full details of the PhD studentship projects available for an April 2016 start:

Interested applicants should liaise directly with the PhD project Director of Studies to obtain further details on the project.


Next generation millimetre wave security screening systems will operate by sampling electric fields of radiometric emission using aperture receiver arrays and processing data directly into imagery using Field Programmable Gate Arrays (FPGAs). This project will investigate architectures and programming of FPGAs linked to commercial satellite receivers for this application.


Next generation millimetre wave aperture synthesis imagers will sample electric fields of radiometric emission using aperture antenna arrays and process this data into images using digital signal processors (DSPs). This approach is the aperture synthesis indirect method of imaging, developed initially by radio astronomers. For the millimetre wave band it has many benefits over the conventional direct focal plane array method of imaging. The most notable benefits for security screening are: 1) the ability to create three-dimensional speckle-free images of a person and their surround (thus leaving no place for the concealment of threats) and 2) the aperture array and digital signal processor is potentially conformally deployable (enabling installation in and around any type of entrance). Digital signal processes in the form of FPGAs are now so powerful that efficient utilisation of only one or two of these devices would be required to build a next generation imager. The objective of the project is to develop FPGA-receiver sub-systems that can demonstrate efficient utilisation of the FPGA real-estate. Success in this area will lead to industry becoming involved in prototype development for new products in the security screening market to access a multi-billion pound per annum industry.

Specifically the aim of the project is to develop a demonstrator for a key part of this next generation security screening imaging technology. Satellite receivers, acting as low cost radiometers over the 10 GHz to 20 GHz band, will be interfaced via an intermediate frequency stage at a few GHz and high-speed switched comparators (acting as single bit digitisers) to the serial inputs of FPGAs. Beginning with a high-speed FPGA development board (capable of multi Gbps serial transfer rates) VHDL programming will be used to perform simple mathematical operations on the data such as complex multiplies, phase shifts and additions, before accumulating the results for an integration time, and passing the result to a PC. These mathematical operations are closely related to the beam forming algorithms. Which combinations of mathematical operations are likely to yield useful results is dictated by the coherence theory of radiometric emission. The project will involve phase locking of the satellite receiver local oscillators and the clocks of comparators and the FPGAs. The data from each receiver channel in the FPGA will be required to be in an in-phase and quadrature (I&Q) format which will require an I&Q demodulator either digitally in the FPGA or as analogue prior to sampling. Assessment of system performance and calibration will be by using the receivers to view simple radiometric (thermal like) sources such as certain types of fluorescent lamps, globars and microwave absorbers at elevated temperatures.


The applicant will be required to demonstrate a knowledge of analogue and digital receiver systems, antenna theory, sampling theory, filtering, heterodyne receivers and demodulators. An understanding of the physics and mathematics of coherence theory will be necessary for the project. Experience the programming of FPGA development boards, VHDL, C and Python will be beneficial. A successful applicant needs to be immensely hardworking and highly motivated. Minimum entry requirement is a first class honours degree, or equivalent, in electrical engineering, mathematics or physics.


Home/EU students

Informal enquiries can be made to:

Dr Neil A. Salmon
Tel: +44(0)161 247 1697
[Email Address Removed]

Please quote the studentship reference: NAS20151.

Applications should be completed using the Postgraduate Research Degree Application Form -

Application Form should be emailed to: [Email Address Removed].

PLEASE NOTE that Section 9 of the application should be used to write a personal statement outlining your suitability for the study, what you hope to achieve from the PhD and your research experience to date.

Applications should be completed using the Postgraduate Research Degree Application Form

Return the completed application to: [Email Address Removed]

PLEASE NOTE: Section 9 of the application should be used to write a personal statement outlining your suitability for the study, what you hope to achieve from the PhD and your research experience to date

26 February 2016

Funding Notes

Funded studentships will cover tuition fees at the home/EU rate and an RCUK matched bursary of £14,057 per annum. Fully funded PhD studentships at MMU are only available to home and EU students

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