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Low Power Design of FPGA Systems


About This PhD Project

Project Description

Field programmable Gate Arrays are becoming the device of choice for many (most) digital systems. They offer the flexibility of software with the performance of hardware. The downside of using FPGAs is their propensity to be high on power. Through analyzing and investigating novel reconfiguration and other techniques, it should be possible to produce innovative mitigation methods for the design of lower power FPGAs designs. This project will focus on the use of bio-inspired methods to add these low power characteristics to FPGA designs.

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