The programmable analogue and digital array (PAnDA) device is a multi-reconfigurable chip that consists of an array of configurable circuit blocks interconnected using a programmable routing structure. The term “multi-reconfigurable” refers to PAnDA’s novel and unique feature to access its reconfiguration facilities on multiple design abstraction levels, each effectively representing a different granularity of the architecture. The highest configuration level makes PAnDA compatible to commercial FPGAs in the sense that logic functions can be mapped to configurable logic blocks. In addition to that—and beyond the capabilities of any FPGA currently available—PAnDA can be configured on additional lower levels offering increasingly finer-grained configuration options all the way down to re-sizing individual transistors, which represent the lowest level of design. This project will focus Physical Unclonable Function (PUF) related to circuit security protection. PUF provides a secure method of hardware identification and authentication by exploiting inherent manufacturing process variation to generate a unique response for each device. We will consider how the special features available on the PAnDA devices can be used to create PUFs.