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About the Project
About SEtS
This is a Studentship opportunity within the Doctoral Centre for Safe, Ethical and Secure Computing (SEtS) in the Department of Computer Science at the University of York. SEtS is a key initiative which supports our strategic vision to internationally lead education and research in the engineering of safe, ethical and secure computational systems. Find out more about SEtS.
About the Project
Supercomputers play an important role in the field of computational science, and are used for a wide range of computationally intensive tasks in various fields across the engineering and sciences spectrum [1]. As the computational power of these systems continues to grow, there is typically a hard constraint on the maximum power that can be drawn by a system. It is therefore vitally important that new systems are procured with energy-efficiency in mind, and that applications are developed to achieve the maximum performance while making every effort to reduce their power requirements [2,3,4].
Although the theoretical peak performance of the fastest machines is rapidly approaching the era of Exascale computation, real applications are typically realising only a fraction of this – representing a significant waste of resources. One potential solution to this is the use of reconfigurable architectures — architectures that can be precisely configured at runtime to contain only the computational units required, in a configuration which is more tailored to the needs of the target application [5,6].
This research project seeks to investigate the applicability of reconfigurable architectures (e.g. field-programmable gate arrays [FPGAs]) to the computational sciences.
Specifically, the objectives of this project will be to (i) evaluate the programmability of FPGAs for applications with a heavy reliance on floating-point calculations; (ii) port a small number of proxy applications from the physics domain to FPGAs; and finally, (iii) analyse the performance of these applications in terms of their runtime and energy performance, in order to quantify the trade-offs that may be available.
Familiarity with parallel programming and programming FPGAs is desired.
Research areas: High-Performance Computing, Embedded Computing, FPGA, Energy-aware computing
Key Dates
- Application submission period: 15 November 2022 - 15 February 2023
- Interviews: 1 March - 20 March 2023
- Notification of offers: 31 March 2023
- Deadline for accepting studentship offers: 17 April 2023
Read more about the application process and follow our step-by-step guidance for applicants: How to apply
Informal enquiries
- Project enquiries: Dr Steven Wright - steven.wright@york.ac.uk
- Application enquiries: cs-pgr-admissions@york.ac.uk
Funding Notes
The Doctoral Scholarship includes full coverage of tuition fees and an annual stipend of £17,668 (full time equivalent for 2022/23). Funding is available to successful UK and International students.
References
[1] Wright, S.A. (2019). Performance Modeling, Benchmarking and Simulation of High Performance Computing Systems. Future Generation Computer Systems, 92, 900-902. https://doi.org/10.1016/j.future.2018.11.020
[2] Roberts, S.I., Wright, S.A., Fahmy, S.A., Jarvis, S.A. (2017) Metrics for Energy-Aware Software Optimisation. High Performance Computing. ISC 2017. Lecture Notes in Computer Science, 10266. https://doi.org/10.1007/978-3-319-58667-0_22
[3] Roberts, S.I., Wright, S.A., Fahmy, S.A., Jarvis, S.A. (2019) The Power-optimised Software Envelope. ACM Transactions on Architecture and Code Optimization, 16, 3, Article 21 (June 2019), 27 pages. https://doi.org/10.1145/3321551
[4] Hackenberg, D., Ilsche T., Schuchart, J., Schöne, R., Nagel, W.E., Simon, M., Georgiou, Y. (2014) HDEEM: High Definition Energy Efficiency Monitoring. In Energy Efficient Supercomputing Workshop (E2SC). 1–10. https://doi.org/10.1109/E2SC.2014.13
[5] Gray, I., Chan, Y., Audsley, N.C., Wellings A. (2014) Architecture-Awareness for Real-Time Big Data Systems. Proceedings of the 21st European MPI Users’ Group Meeting (EuroMPI/ASIA’14). 151–156. https://doi.org/10.1145/2642769.2642798
[6] Nguyen, T., Williams, S., Siracusa, M., MacLean, C., Doerfler, D., Wright, N. J., (2020) The Performance and Energy Efficiency Potential of FPGAs in Scientific Computing. 2020 IEEE/ACM Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), 8-19. https://doi.org/10.1109/PMBS51919.2020.00007
[2] Roberts, S.I., Wright, S.A., Fahmy, S.A., Jarvis, S.A. (2017) Metrics for Energy-Aware Software Optimisation. High Performance Computing. ISC 2017. Lecture Notes in Computer Science, 10266. https://doi.org/10.1007/978-3-319-58667-0_22
[3] Roberts, S.I., Wright, S.A., Fahmy, S.A., Jarvis, S.A. (2019) The Power-optimised Software Envelope. ACM Transactions on Architecture and Code Optimization, 16, 3, Article 21 (June 2019), 27 pages. https://doi.org/10.1145/3321551
[4] Hackenberg, D., Ilsche T., Schuchart, J., Schöne, R., Nagel, W.E., Simon, M., Georgiou, Y. (2014) HDEEM: High Definition Energy Efficiency Monitoring. In Energy Efficient Supercomputing Workshop (E2SC). 1–10. https://doi.org/10.1109/E2SC.2014.13
[5] Gray, I., Chan, Y., Audsley, N.C., Wellings A. (2014) Architecture-Awareness for Real-Time Big Data Systems. Proceedings of the 21st European MPI Users’ Group Meeting (EuroMPI/ASIA’14). 151–156. https://doi.org/10.1145/2642769.2642798
[6] Nguyen, T., Williams, S., Siracusa, M., MacLean, C., Doerfler, D., Wright, N. J., (2020) The Performance and Energy Efficiency Potential of FPGAs in Scientific Computing. 2020 IEEE/ACM Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS), 8-19. https://doi.org/10.1109/PMBS51919.2020.00007
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