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Click here to search FindAPhD.com for PhD studentship opportunitiesAbout the Project
Autonomous robot systems are being developed in many fields for example
transportation, space, industry and healthcare. As well as considering whether these systems are safe we must also consider their security and that the risk of attack from malicious agents is minimised.
Formal verification is a mathematical analysis of systems used often to explore safety and functional properties. Threat modelling is a process identifying threats to a system posed by different actors and their associated risks. In previous work, jointly with researchers from the University of Warwick as part of the FAIR-SPACE project and we proposed a methodology combining formal verification with threat modelling, termed security-minded verification.
This project aims to further develop, apply and analyse security-minded verification focusing on the verification aspects. The project will take place with input and collaboration with researchers at the University of Warwick and the University of Maynooth in conjunction to with the FAIR-SPACE project.
Funding Notes
References
Farrell, M., Bradbury, M., Fisher, M., Dennis, L. A., Dixon, C., Yuan, H. & Maple, C., Using Threat Analysis Techniques to Guide Formal Verification: A Case Study of Cooperative Awareness Messages, SEFM, 2019 (v).
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