About the Project
One of the undisputed trends in the IC industry is the scaling of the fabrication geometries. Besides the clear benefits of lower power consumption, higher speed and higher integration, this trend present new challenges to designers. One of these trade-offs is the usage of back end of line (BEOL) capacitors with low-k dielectrics. The new dielectric allow a higher capacitance per unit area but comes at the cost of increased dielectric absorption and random mismatch. This project will explore in-depth analysis of the capacitor non-idealities limiting the performance of the state of art numerical converters. The main areas of investigation focus on the capacitor mismatch drift and dielectric absorption. Assisted by a group of world leading data converter specialists and academics, you will gather experience in circuit design, layout, characterisation, data analysis and modelling.
Applications are invited for this 3-year Industrial PhD studentship in collaboration with Analog Devices Inc. in Newbury. The studentships will be in the Sustainable Electronic Technologies Group within Electronics and Computer Science (ECS) and based in Analog Devices’ R&D centre in Newbury. The research project will use state-of-the art design tools, fabrication of the ICs on the latest deep submicron technology nodes, and facilities at the University of Southampton and Analog Devices for design and device characterisation.
Candidate Requirements:
Applications would be welcome from candidates holding good degrees (1st class or 2:1 honours MEng, MSc and BEng) in Electronic Engineering, Physics, or a similar programme. Experience in either electronic characterisation or analogue electronic design is strongly desirable. In addition to the standard PhD studentship, this position includes an enhanced annual stipend, industrial placement, and generous annual allowance to cover attendance at international conferences.
This post is open to UK citizens only. The post will be offered to suitable candidates before the deadline.
Informal enquiries may be directed to Kees de Groot, https://www.ecs.soton.ac.uk/people/chdg , ([Email Address Removed] ), or Rares Bodnar ([Email Address Removed] )
Key facts
Entry requirements: first or upper second-class degree or equivalent
Closing date: applications should be received no later than 1 October 2018 for standard admissions, but later applications may be considered depending on the funds remaining in place.
Duration: four years (full-time)
Funding: full tuition fees, for UK students, and a tax-free stipend of £18,000 per year
Assessment: Nine month and 18 month reports, viva voce and thesis examination
Start date: typically September
How to apply:
To apply for this studentship please submit an application for a PhD in Electronics and Electrical Engineering, mentioning the project and project supervisor – see http://www.ecs.soton.ac.uk/phd/how-to-apply
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