Contactless power transfer for 3-D stacked integrated circuits

The advent of Internet of Things (IoT) has created novel opportunities for integrated systems. Envisioned IoT applications in healthcare, entertainment, structural monitoring and other domains will require integrated systems that integrate all different combinations of sensing, actuation, acquisition and processing modules each manufactured in the most suitable technology node. An enabling technology for supporting these systems is three-dimensional (3-D) integration where multiple chips are integrated to form a multi-chip stack.
3-D integrated circuits typically use through-silicon vias (TSVs) for electrical inter-chip connectivity. These solutions, however, are still very expensive and technologically challenging, especially for heterogeneous designs where TSVs between tiers fabricated in different technology nodes are required. Wireless connectivity through magnetic or electric field, on the other hand, can circumvent these limitations providing cost-efficient solutions for inter-chip communication and sufficient power delivery. Designing these wireless inductive links is a challenging approach, due to strict area and power constraints, therefore awaiting new ideas in front-end antenna and circuit design that result in efficient power transfer techniques and reliable data exchange schemes.

This research project offers an exciting opportunity to work on an emerging technology that extends beyond the boundaries of electronic engineering. The student will have the opportunity to explore and develop new design techniques and potentially prototype circuits for inter-tier magnetic links and front-end systems targeting low-power, reliable, and area (cost) efficient solutions for energy transfer. This project will build on existing expertise recently developed in the group in the design of inter-tier communication links. The primary focus will be the design of circuits and on-chip inductors that maximize power transfer between one or more tiers under a variety of physical constraints and system specifications. This project will emphasize low-power wireless 3-D systems in contrast to the existing art of wireless links which has aimed the design of high performance systems. Trade-offs among physical parameters for the on-chip inductors and different circuit designs should be explored leading potentially to several link designs with different traits, offering greater insight in the design of highly heterogeneous vertical systems.