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  PhD Engineering: Flexible Magnetic Sensing Microsystem


   College of Science and Engineering

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  Dr H Heidari  No more applications being accepted  Competition Funded PhD Project (European/UK Students Only)

About the Project

The School of Engineering of the University of Glasgow is seeking a highly motivated graduate to undertake an exciting 3.5-year PhD project entitled “FLEXIBLE MAGNETIC SENSING MICROSYSTEM” within the within the Electronics and Nanoscale Engineering Division.

Flexible electronics has been recently attracted a lot of attention in the robots and human-machine interfaces application. Currently, flexible electronic microsystems have been realized mainly through exploring organic semiconductors, amorphous and polycrystalline silicon, and more recently also using single crystal silicon to meet high-performance requirements. The high performance CMOS technology still plays main role for readout circuit and sensor interfaces in high-speed and low-power consumption applications. However, because of lower sensitivity of the CMOS-based magnetic sensors they need complex amplification and readout circuit. On the other hand, state-of-the-art flexible magnetic sensors still lack high performance front-ends and they cannot form the smart microsystems. This project aims to combine heterogeneously a high-sensitive non-CMOS flexible magnetic sensor (e.g. Hall Effect and Giant Magneto-Resistance (GMR)) with an analogue front-end circuit in a standard CMOS technology. The analogue front-end circuit consists of different blocks including operational amplifier (op-amp), analogue-to-digital converter (ADC) etc. The sensor interface design will be sent to an external foundry for fabrication and in-house post processing steps will be carried out after receiving the fabricated chip to the chip and interface with the magnetic sensors.

In this PhD project the candidate will involve in fabrication of magnetic sensor in the James Watt Nanofabrication Centre (JWNC), full design of the analogue front-end in the Cadence environment (including schematic and layout), post CMOS processing including thinning down the fabricated chip, PCB design, characterization, test and measurement of the final microsystem prototype.

The ideal candidate will have good analogue circuit design skills and experience in Cadence and Verilog-A. Knowledge of fabrication, PCB design and characterization are desirable.

The student will be a part of the Bendable Electronics and Sensing Technologies (BEST) Group (www.gla.ac.uk/best/) in the University of Glasgow. The student will have the opportunity to undertake an internship with leading global industrial and academic partners.

Applicants should be available to start in January 2017.

Funding Notes

The studentship is supported by the School, and it will cover home tuition fees and provide a stipend of £14,510 per annum for 3.5 years.

To be eligible for this funding, applicants must have ‘settled status’ in the United Kingdom and must have been ‘ordinarily resident’ for the past three years.

It should be noted that other terms may also apply. For full details about eligibility please visit: http://www.epsrc.ac.uk/skills/students/help/Pages/eligibility.aspx